APECS Pilot Line

The pilot line for “Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems” (APECS for short) is an important cornerstone of the EU Chips Act, designed to drive chiplet innovation and increase semiconductor research and manufacturing capacity in Europe. The Ferdinand-Braun-Institut is one of the institutes cooperating within the Research Fab Microelectronics Germany (FMD), working closely with other European partners to set up the APECS pilot line. The partners are thus significantly contributing to strengthening Europe's technological resilience and thereby also boosting global competitiveness in the semiconductor industry.

FBH contributes its technological expertise within APECS in two key areas: 

  • Bipolar InP chiplets
    • for high-frequency applications in the W and D bands based on indium phosphide (InP). By combining these with SiGe BiCMOS chips from the Leibniz Institute for High-Performance Microelectronics (IHP), the partners are creating heterointegrated high-performance transceivers supported by a special assembly design kit (ADK).
    • for broadband circuits, e.g., drivers in electro-optical transmitters, which are used in the project along with photonic InP components from Fraunhofer HHI.
  • Setting up a pilot line for the integration of laser chiplets based on gallium arsenide (GaAs) covering the wavelength range from 620 nm to 1180 nm, so-called photonic integrated circuits (PICs). Silicon nitride (SiN) material platforms will initially be used for the passive elements.
Laboratory environment with a technician in protective clothing working at advanced semiconductor equipment. The "APECS" logo and tagline "European Chiplet Innovation" are prominently displayed, with a blue geometric overlay design.

European Chiplet Innovation: APECS Pilot Line in the framework of the EU Chips Act

A technician in a cleanroom suit is operating advanced semiconductor manufacturing equipment. The background shows a laboratory with a monitor displaying wafer-related data.

Within the framework of the APECS pilot line it will be possible to further expand the R&D infrastructure for semiconductor technologies and applications in the coming years. © loewn | Bernhard Wolf

Close-up image of a semiconductor wafer with numerous microchips arranged in a grid pattern, reflecting various colors due to light diffraction.

Post-CMOS pressure sensor chiplets with wafer level packaging before dicing. © Fraunhofer ISIT

The APECS pilot line provides major industrial companies, SMEs, and start-ups with low-threshold access to cutting-edge technologies and ensures secure, resilient semiconductor value chains. It focuses on the scalable industrial transfer of newly developed innovations in the field of heterointegration, particularly the use of novel chiplet technologies, thus bridging the gap to application-oriented research. APECS goes beyond conventional “system-in-package” (SiP) methods and aims to deliver robust and trustworthy heterogeneous systems that significantly increase the innovative capacity of the European semiconductor industry.

The various European pilot lines represent thematically focused infrastructure investments. Each pilot line addresses a specific technological domain. The German Chips Competence Center (G3C) is the central point of contact for companies and researchers looking to realize innovative ideas using chips and wafer technologies.

This is the official project website for the APECS pilot line.

APECS is co-financed by Chips Joint Undertaking and national funding from Belgium, Germany, Finland, France, Greece, Austria, Portugal, and Spain as part of the “Chips for Europe” initiative. The total funding for the APECS pilot line amounts to €730 million over 4.5 years. Funding at FBH covers both the expansion of the necessary pilot line to the latest technological standard and the establishment of the design environment for users of the InP chiplet process.