M. Hossain1, R. Doerner1, H. Yacoub1, T.K. Johansen2, W. Heinrich1, V. Krozer1
Proc. 16th European Microwave Integrated Circuits Conference (EuMIC 2021), London, UK, Apr. 3-4, ISBN: 978-2-87487-064-4, pp. 140-143 (2022).
This paper presents a D-band low noise amplifier (LNA) using an 0.5 µm InP-DHBT technology. The LNA circuit design is based on a 2-way combined cascode unit power cell. The measured LNA exhibits 10 to 16 dB small signal gain and 11 to 8.5 dB noise figure (NF) in the frequency range from 140 to 170 GHz. The dc power consumption is only 103 mW and results in a power-added efficiency (PAE) of 11 % at 146 GHz. The output 1-dB compression point (OP_1dB) reaches 10 dBm at 146 GHz. The chip area is only 1.6 × 1.1 mm2. To the best knowledge of the authors, the performance combination in terms of low NF, high linearity as well as PAE beyond 140 GHz is unique so far.
1 Ferdinand-Braun-Institut gGmbH, Leibniz-Institut für Höchstfrequenztechnik (FBH), Berlin, Germany
2 Technical University of Denmark (DTU), Denmark
InP double heterojunction bipolar transistor (DHBT), monolithic microwave integrated circuit (MMIC), low noise amplifier (LNA), noise figure (NF), transferred-substrate process (TS).
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