M. Fregolent1,2, A. Marcuzzi1,2, C. De Santi1,2, E. Bahat Treidel3, G. Meneghesso1,2, E. Zanoni1,2 and M. Meneghini1,2,4
IEEE International Reliability Physics Symposium (IRPS 2023), Monterey, USA, Mar. 26-30, ISBN 978-1-6654-5672-20, pp. 2C.4-1-2C.4-5 (2023).
We present a detailed investigation of charge trapping processes in Al2O3/GaN vertical MOS capacitors, detected by means of advanced capacitance measurements. The devices stressed at positive bias present a trapping mechanism that results in an increase of the flatband voltage, while under negative voltages the negative charge stored in bulk and interface states is released with a leftward shift of the C-V characteristic. We also demonstrated that the formation of the hump in depletion regime is the result of trapping of electrons at the oxide-semiconductor interface. The detected behavior is modeled by considering the DIT profile extrapolated by photoassisted CV measurements. The results provide relevant input for the design of stable and reliable MOS transistors based on GaN.
1 Department of Information Engineering, University of Padova, Via Giovanni Gradenigo 6B, 35131 Padova, Italy
2 IUNET - National Interuniversity Consortium for Nanoelectronics, Italy
3 Ferdinand-Braun-Institut (FBH), 12489 Berlin, Germany
3 Department of Physics and Astronomy, University of Padova, via Marzolo 8, 35131 Padova, Italy
MOS capacitors, trapping, vertical GaN
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