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On the Conduction Properties of Vertical GaN n-Channel Trench MISFETs

E. Bahat Treidel1, O. Hilt1, V. Hoffmann1, F. Brunner1, N. Bickel1, A. Thies1, K. Tetzner1, H. Gargouri2,3, C. Huber4, K. Donimirski5, and J. Würfl1

Published in:

IEEE J. Electron Devices Soc., vol. 9, pp. 215-228, doi:10.1109/JEDS.2021.3056697 (2021).


ON-state conductance properties of vertical GaN n-channel trench MISFETs manufactured on different GaN substrates and having different gate trench orientations are studied up to 200°C ambient temperature. The best performing devices, with a maximum output current above 4 kA/cm2 and an area specific ON-state resistance of 1.1 mΩ·cm2, are manufactured on ammonothermal GaN substrate with the gate channel parallel to the a-plane of the GaN crystal. The scalability of the devices up to 40 mm gate periphery is investigated and demonstrated. It is found that, in addition to oxide interface traps, the semiconductor border traps in the p-GaN layer limit the available mobile channel electrons and that the channel surface roughness scattering limits the channel mobility. Both strongly depend on the gate trench orientation and on the GaN substrate defect density.

1 Ferdinand-Braun-Institut gGmbH, Leibniz-Institut für Höchstfrequenztechnik, 12489 Berlin, Germany
2 Plasma Process Technology Department, SENTECH Instruments GmbH, 12489 Berlin, Germany
3 Konica Minolta Group, Instrument Systems GmbH, 81677 München, Germany
4 Corporate Research Division, Advanced Technologies and Micro Systems Department, Robert Bosch GmbH, 71272 Renningen, Germany
5 SEEN Semiconductors Ltd., 02-672 Warsaw, Poland

Index Terms:

Vertical GaN trench MISFETs, HVPE, ammonothermal, conductivity, mobility, mobile charge carriers’ density, gate insulator, atomic layer deposition (ALD).

This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/.

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