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Low-resistive gate module for RF GaN-HFETs by electroplating

H. Yazdani, A. Thies, P. Stützle, O. Bengtsson, O. Hilt, W. Heinrich and J. Würfl

Published in:

Semicond. Sci. Technol., vol. 39, no. 2, pp. 025007, doi:10.1088/1361-6641/ad1b16 (2024).


This paper presents a novel approach for reducing the gate resistance (Rg) of K and Ka-band GaN HFETs with 150 nm gate length through a new gate metallization technique. The method involves increasing the gate cross-section via galvanic metallization using FBH’s Ir-sputter gate technology, which allows an increase in gate metal thickness from the current 0.4 µm to approximately 1.0 µm for the transistors under investigation. This optimization leads to a substantial 50% reduction in gate series resistance, resulting in significant improvements in the RF performance. Specifically, the devices achieve 20% higher output power density and 10% better power-added efficiency at 20 GHz and Vds = 20 V. The decreased gate resistance enables new degrees of freedom in design, such as longer gate fingers and/or shorter gate lengths, for more efficient power cells operating in this frequency range.

Ferdinand-Braun-Institut, Leibniz-Institut für Höchstfrequenztechnik (FBH), Berlin, Germany


GaN HFETs, two-dimensional electron gas (2DEG), gate resistance

© 2024 The Author(s). Published by IOP Publishing Ltd.
Original content from this work may be used under the terms of the Creative Commons Attribution 4.0 licence. Any further distribution of this work must maintain attribution to the author(s) and the title of the work, journal citation and DOI.

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