C. Kuring1, M. Wolf2, X. Geng1, O. Hilt2, J. Böcker1, N. Wieczorek1, J. Würfl2 and S. Dieckerhoff1
11th International Conference on Integrated Power Electronics Systems (CIPS 2020), Berlin, Germany, Mar. 24-26, ETG-Fb. 161: CIPS 2020, ISBN 978-3-8007-5225-6, pp. 8-13 (2020).
Power electronic systems employing wide-bandgap GaN transistors promise high efficiency operation and superior power density but require minimized parasitic circuit elements and an effective cooling concept. This paper presents a halfbridge module integrating two GaN HEMTs with their gate drive stages and the DC-link capacitance on a multilayer AlN substrate. The small layer distance of 10 µm achieved on the GaN half-bridge module allows for minimization of layout related parasitic inductances. The parasitic circuit elements are evaluated and compared to conventional 4-layer PCB design using 3D-FEM field simulation and measurements. Due to a lateral commutation loop design, the GaN half-bridge module achieves notably lower parasitic capacitances but also a smaller commutation loop inductance. The thermal characterization of the fabricated half-bridge module validates the high cooling capability introduced by the AlN-substrate. The switching characteristics of the proposed GaN half-bridge module are studied in hard-switched mode.
1 Technische Universität Berlin, Chair of Power Electronics, Einsteinufer 19, 10587 Berlin, Germany
2 Ferdinand-Braun-Institut, Leibniz-Institut für Höchstfrequenztechnik Gustav-Kirchhoff-Str. 4, 12489 Berlin, Germany
Copyright © VDE Verlag GmbH Berlin Offenbach. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the VDE Verlag GmbH.
Full version in pdf-format.