Techniques towards GaN power transistors with improved high voltage dynamic switching properties

J. Würfl, O. Hilt, E. Bahat-Treidel, R. Zhytnytska, P. Kotara, F. Brunner, O. Krueger, M. Weyers

Published in:

IEEE 2013 International Electron Devices Meeting (IEDM), Washington, DC, USA, Dec 9-11, pp. 6.1.1 - 6.1.4 (2013).

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Abstract:

Dynamic switching limitations of GaN power devices are analyzed and techniques towards improving fast high voltage switching are proposed and verified experimentally with an emphasis on optimized epitaxial buffer designs. Normally-off and normally-on GaN transistors are presented; depending on specific technology the dynamic on-state resistance increase reduces to a factor of 2.5 for 500 V switching from off-state drain bias. Normally-off transistors using p-GaN gate technology demonstrated a RonxQg product of 0.4 ΩgnC for switching at 400 V drain bias.

Ferdinand-Braun-Institut, Leibniz-Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Straße 4, D-12489 Berlin, Germany