Bulk and interface trapping in the gate dielectric of GaN based metal-oxide-semiconductor high-electron-mobility transistors

M. Ťapajna1, M. Jurkovič1, L. Válik1, Š. Haščík1, D. Gregušová1, F. Brunner2, E.-M. Cho2, and J. Kuzmík1

Published in:

Appl. Phys. Lett., vol. 102, no. 243509 (2013).

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The trapping phenomena in GaN metal-oxide-semiconductor high-electron mobility transistor structures with 10 and 20-nm thick Al2O3 gate dielectric grown by metal-organic chemical vapor deposition were deeply investigated using comprehensive capacitance-voltage measurements. By controlling the interface traps population, substantial electron trapping in the dielectric bulk was identified. Separation between the trapping process and the interface traps emission allowed us to determine distribution of interface trap density in a wide energy range. Temperature dependence of the trapping process indicates thermionic field emission of electrons from the gate into traps with a sheet density of ∼1013 cm-2, located a few nm below the gate.

1 Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, 841 04 Bratislava, Slovakia
2 Ferdinand-Braun-Institut, Leibniz-Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Straße 4, 12489 Berlin, Germany


aluminium compounds, gallium compounds, III-V semiconductors, interface states, MOCVD, MOSFET, thermionic emission, wide band gap semiconductors.