Effect of External Mechanical Stress on DC Performance and Reliability of Integrated E/D GaN HEMTs
IEEE Trans. Semicond. Manuf., vol. 31, no. 4, pp. 419-425 (2018).
Copyright © 2018 IEEE - All rights reserved. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
The purpose of this paper is to introduce a novel concept for integrating enhancement mode (E-mode) and depletion mode (D-mode) AlGaN/GaN HEMTs in the same fabrication process. Unlike existing E/D integration technologies (gate recess etching, fluorine implantation, etc.), the proposed technology does not involve process steps that damage the semiconductor layer and therefore more reliable devices are to be expected. It allows control of 2DEG density under the gate region by means of external mechanical stress applied to the AlGaN barrier layer. The stress is introduced by a dedicated SiNx passivation film. E-mode and D-mode GaN HEMTs with state-of-the-art dc performance were fabricated on the same wafer using the proposed technology. The process flow for E/D transistors fabrication is presented as well.
1 GaN Department, Ampleon Netherlands B.V., 6534 AV Nijmegen, The Netherlands
2 Ferdinand-Braun-Institut, Leibniz-Institut für Höchstfrequenztechnik, 12489 Berlin, Germany
GaN HEMT, silicon nitride, compressive stress, E/D transistors.