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Patente

Threshold Voltage Engineering in GaN-Based HFETs: A Systematic Study With the Threshold Voltage Reaching More Than 2 V

H. Hahn1, F. Benkhelifa2, O. Ambacher2, F. Brunner3, A. Noculak4, H. Kalisch1, and A. Vescan1

Published in:

IEEE Trans. Electron Devices, vol. 62, no. 2, pp. 538-545 (2015).

Abstract:

One of the key challenges for the adoption of gallium nitride (GaN)-based heterostructure field effect transistors (HFETs) in power-switching applications is obtaining enhancement mode behavior. A large variety of methods have been applied to shift the threshold voltage Vth of HFETs. However, most of the time, approaches were discussed individually, neglecting the effects of combinations. Hence, in this paper, a comprehensive study of four different approaches to shift Vth well into the positive range is presented. We show the effects of different gate metallizations, of a backbarrier, of a gate oxide, and of a gate recess. Each approach is discussed individually, and special focus is on the insulator/semiconductor interface, which is apparently different with and without gate recess. The final device exhibits a Vth of +2.3 V, which is shown to be stable when applying OFF-state stress during dynamic characterization.

1 GaN Device Technology, RWTH Aachen University, 52062 Aachen, Germany
2 Fraunhofer Institute for Applied Solid State Physics, 79108 Freiburg, Germany
3 Ferdinand-Braun-Institut, Leibniz-Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Straße 4, 12489 Berlin, Germany
4 was with the Chair of Electromagnetic Theory, RWTH Aachen University, Aachen 52062, Germany, is now with the Chair of High Frequency Electronics, RWTH Aachen University, 52062 Aachen, Germany

Index Terms:

Atomic layer deposition (ALD), enhancement mode, gallium nitride (GaN), HEMT, heterostructure field-effect transistor (HFET), MOS-HEMT, MOS-HFET.

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