Correlating Interface and Border Traps With Distinctive Features of C–V Curves in Vertical Al2O3/GaN MOS Capacitors
N. Zagni1,a, M. Fregolent2,a, G. Verzellesi3, A. Marcuzzi2, C. De Santi2, G. Meneghesso2, E. Zanoni2, E. Bahat Treidel4, E. Brusaterra4, F. Brunner4, O. Hilt4, M. Meneghini2, and P. Pavan1
Published in:
IEEE Trans. Electron Devices, vol. 71, no. 3, pp. 1561-1566, doi:10.1109/TED.2023.3335032 (2024).
Abstract:
In this article, we present an analysis of the correlation between interface traps (ITs) and border traps (BTs) on distinctive features of C–V curves in vertical Al2O3/gallium-nitride (GaN) MOS capacitors. First, pulsed C–V curves were characterized during the application of quiescent gate bias stresses of different magnitudes and signs. This characterization revealed four main distinctive features: 1) rightward rigid shift; 2) leftward rigid shift; 3) decrease of the ΔC–ΔV slope; and 4) formation of a hump in a gate bias range before the accumulation of electrons at the oxide/semiconductor interface. By means of a combined experimental/simulation analysis, these features were univocally attributed to specific ITs or BTs in the overall trap distribution. The simulation-aided analysis enhances the physical understanding of the C–V curves features and increases the dependability of the adopted IT measurement technique, allowing for a more rapid process optimization and device technology development.
1 Department of Engineering "Enzo Ferrari", University of Modena and Reggio Emilia, 41125 Modena, Italy
2 Department of Information Engineering, University of Padova, 35131 Padova, Italy
3 Department of Sciences and Methods for Engineering (DISMI) and the EN&TECH Center, University of Modena and Reggio Emilia, 42122 Reggio Emilia, Italy
4 Ferdinand-Braun-Institut (FBH), 12489 Berlin, Germany
a contributed equally to this work
Index Terms:
Al2O3, border traps (BTs), interface traps (ITs), negative bias temperature instability (NBTI), positive bias temperature instability (PBTI), vertical gallium-nitride (GaN) metal-oxide-semiconductor capacitor (MOSCAP).
© 2023 The Authors. This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/
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