A 1 W Si-LDMOS Power Amplifier with 40% Drain Efficiency for 6 GHz WLAN Applications

D. Gruner¹, R. Sorge², O. Bengtsson³, A.Z. Markos¹, and G. Boeck¹

¹ Microwave Engineering Laboratory, Berlin Institute of Technology, Einsteinufer 25, 10587 Berlin, Germany
² IHP Innovations for High Performance Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
³ Ferdinand-Braun-Institut, Leibniz-Institut fuer Höchstfrequenztechnik, Gustav-Kirchhoff-Straße 4, D-12489 Berlin, Germany

Published in:
IEEE MTT-S Int. Microw. Symp. Dig., Anaheim, CA, May 25-27, pp. 517-520 (2010).
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Abstract:
The design and characterization of LDMOS power transistors and amplifiers developed for 6 GHz WLAN applications are presented. Transistors of different size were fabricated in a 0.25 µm SiGe:C BiCMOS technology and have been characterized using a load/source pull measurement system. Based on this characterization a 5.8-5.9 GHz power amplifier was designed, fabricated and tested. By using on-board Wilkinson combiner structures an output power of 1 W at 1 dB power compression was achieved. The measured maximum drain efficiency/PAE were 40/28 % with a small signal gain of 7.2 dB. From the modulated signal evaluation using a 802.11p test signal an ACPR of -38 dBc and an error vector magnitude of 3% were determined at 1 dB peak power compression.

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