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Verification of Wafer-Level Calibration Accuracy at Cryogenic Temperatures
A. Rumiantsev1,
R. Doerner2, P. Sakalas3,4
1 SUSS MicroTec Test Systems GmbH, Suss-Str. 1, Thiendorf OT Sacka, Germany
2 Ferdinand-Braun-Institut für Höchstfrequenztechnik, D-12489 Berlin, Germany
3 Dresden University of Technology, CEDIC, 01062 Dresden, Germany
4 Semiconductor Physics Institute, Fluctuation Phenomena Lab., 01108 Vilnius, Lithuania
Published in:
68th ARFTG Conference Digest, Broomfield, Colorado, 2006.
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Abstract:
This article presents the results of accuracy
verification of wafer level calibration at cryogenic temperatures
based on coplanar calibration standards. For the first time, the
electrical characteristics of commercially available coplanar
calibration lines were extracted at the temperature of liquid
helium. It was demonstrated that the temperature dependent
variation of the characteristic impedance of the tested lines is
within ±1% tolerance of the nominal value of 50 Ω for a
temperature range from room temperature down to 4 K. Finally,
the accuracy of the LRM+ calibration method at cryogenic
temperatures was verified by definition of the worst case error
bounds for the measurement of passive devices and compared to
the reference NIST multiline TRL.
Index Terms:
cryogenic, calibration, error correction, calibration comparison, scattering parameters measurement.
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